Dynamic Instruction Scheduling

Dynamic Scheduling is a technique in which the hardware rearranges the instruction execution to reduce the stalls, while maintaining data flow and exception behavior. The advantages of dynamic scheduling are It handles cases when dependences are unknown at compile time - e.g., because they may involve a memory reference

Reorder buffer amp Speculative execution !9 Outline Dynamic instruction scheduling Out-of-order OoO execution !10 Each instruction has to go through all 5 pipeline stages IF, ID, EXE, MEM, WB in order only valid if it's single-issue, RISC-V 5-stage pipeline An instruction can enter the next pipeline stage in the next cycle if

Microsoft PowerPoint - dyn1.ppt

A dynamic scheduling technique has to insure that any instructions obeyed out of sequence do not change the contents of any registers which are to be used by any instructions whose execution has been delayed temporarily. A simple set of rules for determining if a given-instruction can be obeyed out of sequence is as follows

Dynamic Scheduling 4 Recap addressing hazards The concept of dynamic instruction schedule Tomasulo Algorithm Register renaming 5

Energy-efficient dynamic instruction scheduling logic through instruction grouping Dynamic instruction scheduling logic is quite complex and dissipates significant energy in microprocessors that support superscalar and out-of-order execution. We propose a novel microarchitectural technique to reduce the complexity and energy

Dynamic Scheduling Overcoming Data Hazards with Dynamic Scheduling The Dynamic Scheduling is used handle some cases when dependences are unknown at a compile time. In which the hardware rearranges the instruction execution to reduce the stalls while maintaining data flow and exception behavior. It also allows code that was compiled with one pipeline in mind to run efficiently on a different

Recently, Palacharla, Jouppi, and Smith 3 warned that the dynamic instruction scheduling logic for current machines performs an atomic operation. Either you sacrifice IPC by pipelin-ing this logic, thereby eliminating its ability to execute de-pendent instructions in consecutive cycles.

Dynamic scheduling, as its name implies, is a method in which the hardware determines which instructions to execute, as opposed to a statically scheduled machine, in which the compiler determines the order of execution.

Dynamic instruction scheduling Out-of-order OoO execution Scheduling instructions based on data dependencies Draw the data dependency graph, put an arrow if an instruction depends on the other. 2 movl rdi, ecx addq 4, rdi addl ecx, eax 6 4 7 cmpq rdx, rdi jne .L3 3 5 9