Pie Table Vector

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After the reset and boot is complete, the PIE vector table should be initialized by the user's code. Then the application enables the PIE vector table. From that point on the interrupt vectors are fetched from the PIE vector table. Note when a reset occurs, the reset vector is always fetched from the vector table as shown in Table 107. After a

Setting up the PIE vector table Q How do I link my ISR function to the corresponding interrupt flag bit? The CC Header Files and Peripheral Examples are a great place to start as they provide peripheral examples with the interrupts already configured. No matter if you are using SPI, SCI, ADC, etc. this software package has interrupt examples.

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The PIE vector table is being initialized by using quotScPieVectorTableInitializationquot function. Because of current way of implementation, it will occupy .cinit, .text and .ebss. To avoid all these, below is the other way of implementation where you can reduce considerable amount of memory. The differences are captured in Table.

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C28x PIE module control registers, vector table, PIE groups. C28x interrupt control registers IER, IFR, INTM in particular. For more information on these topics please refer to the following Interrupts at the CPU level and how the CPU responds to an interrupt is documented in the TMS320C28x CPU and Instruction Set Reference Guide spru430

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Part Number TMS320F280049M Hi, In the technical reference manual for F24004x processor, PIE channel mapping table the interrupts INT7.11, INT7.12, INT7.13 and INT7.14 are allocated to FSITX_INT1, FSIRX_INT1, FSITX_INT2 and FSIRX_INT2 respectively but in the f28004x_pievect.h file, PIE_VECT_TABLE struct definition it is allocated with only reserved as below